Phase Locked Loop/Clocked Circuits

What it is about

You will learn the principles of clocked circuits and phase-locked loops (PLL) as well as their modeling in the time and frequency domain. In the end you will be able to understand basic PLL architectures and clock generation techniques and describe the connection between theoretical modeling and practical circuit behavior.

What you will be able to do

• Understand concepts and structures of PLL and clocked circuits
• Analyze differences between time and frequency domain
• Describe classes of oscillators and methods for clock generation
• Explain fundamentals of PLL modeling and noise consideration
• Classify digital and analog as well as integer- and fractional-PLL variants
• Describe the relationship between circuit specifications and sizing/structure
• Understand basics of digital phase control and interpolation

What the module consists of

• LecturePresentation of concepts and theory with regular Q&A
• Exercise / Self-studyWeekly tasks for deepening, discussion in a separate session
• MATLAB-/LTspice exercisesSupport understanding of the interplay between modeling and practical circuit behavior

Teaching method

• weekly lectures with Q&Afor introduction and clarification of concepts
• weekly self-study tasks with discussionfor deepening and applying what was learned
• Simulations (MATLAB, LTspice)to demonstrate interactions between model and real circuit behavior