Testing Digital Circuits

What it is about

You will learn fundamentals and methods for testing digital integrated circuits. In the end you will be able to assess fault models and test quality, generate test patterns, design measures for testability (including scan-path and BIST) as well as evaluate memory and special tests.

What you will be able to do

Distinguishing Testing vs. Verification
Fault models, fault detection, redundant faults, fault coverage
Methods for test pattern generation (Boolean differences, D‑Algorithm, Fault Simulation)
Analysis of test complexity using complexity theory
Passive test methods (e.g., ad-hoc measures, Scan-Path)
Active test methods (Built-In Self-Test, BIST)
Memory fault models and memory test algorithms
Knowledge of test standards (e.g., IEEE 1149.1) and other topics (IDDQ, analog test, Fault Analysis)

What the module consists of

LectureDelivery of the fachliche Inhalte und Prinzipien
Exercises/TutorialsDeepening and application of the lecture material; exercise associated with each chapter

Teaching method

Lectures (teacher-centered)Introduction and systematic presentation of the topics
Exercises/Tutorials (student-centered)Applying and practicing what has been learned; consolidation through repeated exercise blocks

What you should already know

Digital IC-Design
Electronic Design Automation
Basics of digital circuit designrecommended

Assessment

Written examWritten testProject workReportPresentationOral examPortfolioListening comprehension

Written exam, duration 60 minutes. The ability to understand, apply and develop test solutions for digital ICs on a small digital circuit with single-stuck-at faults will be tested (including test pattern calculation, parts of a scan-path design and BIST). Also expected is an understanding of the underlying algorithms and methods (e.g., D-Algorithm, test complexity analysis, IEEE 1149.1, memory and IDDQ tests).

Reading list

M. Bushnell, V. Agrawal - Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits
M. Abramovici, M. Breuer, A. Friedman - Digital Systems Testing and Testable Design

Dates

Lecture with exerciseTesting Digital Circuits2 groups to choose from

ATue16:45–18:15
0220, Hörsaal m. Exp.-Bühne (0502.EG.220)
15× · 13.10.–02.02.
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- 03.11.
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- 01.12.
- 08.12.
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- 02.02.
BThu16:45–18:15
0220, Hörsaal m. Exp.-Bühne (0502.EG.220)
14× · 15.10.–04.02.
- 15.10.
- 22.10.
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- 05.11.
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- 26.11.
- 10.12.
- 17.12.
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- 04.02.

From the current semester, not binding. You attend one of several groups; the timetable automatically suggests the one with the fewest clashes.

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