Technologie und Messtechnik für CMOS-Bauelemente

What it is about

You deepen your knowledge of industry-oriented CMOS fabrication techniques and learn to electrically characterize finished processed 200-mm silicon wafers with MOSFETs, JFETs, diodes, capacitors and test structures. In the end you will be able to evaluate measurement data, analyze inhomogeneities across the wafer, derive process optimizations, and present the results.

What you will be able to do

• Describe essential process steps for MOSFETs, JFETs and classical CMOS elements
• PlanMeasurement series for process characterization
• Independently electrically characterize wafers with semi-automatic wafer probers
• Analytically evaluate obtained measurement data
• Investigate causes of inhomogeneities in characteristic quantities
• Write a report on possible process optimizations
• Present results in an understandable manner

What the module consists of

• Vorlesung/EinführungConveying classical CMOS manufacturing techniques and guided tour through areas of an industry-oriented cleanroom
• Praktikum/LaborElectrical characterization of components on individual chips or 200‑mm wafers with semi-automatic wafer probers
• Auswertung/BerichtAnalysis of the measurement data, preparation and creation of a written report
• PräsentationFinal presentation and discussion of the laboratory results

Teaching method

• PräsentationIntroduction to fabrication techniques and theoretical background
• ReinraumführungIllustrative complement to practice and on-site insight into industry-relevant processes
• Gemeinsame VersuchsplanungStudents develop measurement plans together with supervisors
• Einweisung am Waferprober und LaborarbeitPractical conduct of electrical measurements
• Datenanalyse und BerichtserstellungSystematic evaluation of results and documentation
• AbschlussvortragTraining of presentation and discussion skills