What it is about
You will learn the design process of mixed hardware/software systems (e.g., SoCs) – from functional graphs through partitioning into hardware and software parts to FPGA netlists and executable object code. In the end, you will be able to model design problems, apply partitioning and scheduling algorithms, and evaluate the quality of resulting HW/SW solutions.
What you will be able to do
- Specification and modeling of mixed HW/SW solutions
- Optimized division of sub-tasks into hardware or software partitions
- Binding of tasks to specific processing units
- Temporal planning (scheduling) of tasks
- Application of the top-down design flow: specification, exploration, refinement
- Use of partitioning algorithms (e.g., hierarchical clustering, group migration, simulated annealing, tabu search)
- Application of static and dynamic scheduling algorithms
- Assessment and adjustment of design quality for SoC architectures
What the module consists of
- VorlesungFundamentals and presentation of the topics
- TutorialDiscussion and solution of sample problems
- SelbststudiumReading scientific publications for deepening
- FallstudienDiscussion on practical application to embedded systems/SoC
Teaching method
- Presentation during the lectureConveying the fundamental concepts
- Group discussionsDeepening and exchange on treated topics
- Tutorial with example problemsApplying and practicing the algorithms and methods
- Self-study (scientific publications)Independent deepening and understanding of current approaches
- Case studiesPractical understanding of the problems to be solved